{"id":"61005286-ae7b-4467-9a83-05aacd45a220","title":"RTL Engineer","company":{"id":"cc3730fa-26a0-45ff-bb78-244892955fcc","name":"SEL Schweitzer Laboratories, Inc.","website":null,"url":"https://yesjob.brogu.ca/companies/cc3730fa-26a0-45ff-bb78-244892955fcc"},"url":"https://yesjob.brogu.ca/jobs/61005286-ae7b-4467-9a83-05aacd45a220","apply_url":"https://selinc.wd1.myworkdayjobs.com/SEL/job/Canada---Burnaby/Senior-RTL-Engineer_2026-21456","status":"open","location":"Canada - Burnaby","locations":[{"city":"Burnaby","region":null,"country":"CA"}],"workplace":"onsite","remote_eligible_countries":[],"employment_types":["full_time"],"work_auth_required":"unspecified","term":null,"salary_cad_per_year":{"max":158400,"min":105600},"languages_required":[],"seniority":"senior","first_seen_at":"2026-11-05T17:29:37.231Z","last_seen_at":"2026-11-10T04:42:19.373Z","salary_text":null,"summary":"- Full-time RTL (VHDL/Verilog) digital logic engineer role on SEL's R&D Communications team, focused on FPGA design, verification and technical leadership.\n- Located in Burnaby, BC; the posting states the position is located there, so candidates must be able to work from Burnaby.\n- Requires a B.S. in Electrical Engineering or equivalent and 5+ years of combined RTL, FPGA, firmware and verification experience.\n- Pay range is $105,600 to $158,400 CAD per year; work authorization requirements are not stated.","sources":["https://selinc.wd1.myworkdayjobs.com/SEL/job/Canada---Burnaby/Senior-RTL-Engineer_2026-21456"]}