{"id":"da5711ef-0ca6-4ba5-a296-42ad3bae2107","title":"Sr ASIC Design Verification Engineer, Low Power AI","company":{"id":"c50b3607-4ab3-4e80-807b-d17fca6c3c88","name":"Qualcomm","website":"https://careers.qualcomm.com","url":"https://yesjob.brogu.ca/companies/c50b3607-4ab3-4e80-807b-d17fca6c3c88"},"url":"https://yesjob.brogu.ca/jobs/da5711ef-0ca6-4ba5-a296-42ad3bae2107","apply_url":"https://careers.qualcomm.com/careers/job/446720190988","status":"open","location":"Markham, Ontario, Canada","locations":[{"city":"Markham","region":"ON","country":"CA"}],"workplace":"onsite","remote_eligible_countries":[],"employment_types":[],"work_auth_required":"unspecified","term":null,"salary_cad_per_year":null,"languages_required":[],"seniority":null,"first_seen_at":"2026-11-05T19:11:06.103Z","last_seen_at":"2026-11-09T08:54:06.284Z","salary_text":null,"summary":"- Senior ASIC design verification role on Qualcomm's Audio AI low-power subsystem team, based in Markham, Ontario (onsite).\n- Requires a bachelor's degree in science/engineering plus 4+ years (or a master's with 3+, PhD with 2+) of ASIC design/verification experience; the requirements list 2+ years.\n- Core skills: expert Verilog/VHDL, SystemVerilog/UVM or SystemC, and working knowledge of C; Perl, Python, and GNU Make are a plus.\n- Pay range shown as $129,600–$179,600 (assumed CAD, annual); no visa sponsorship or work-authorization terms stated.","sources":["https://careers.qualcomm.com/careers/job/446720190988"]}