{"id":"f9399fef-9c83-4f84-8455-e4841fd80af7","title":"ASIC Verification Engineer","company":{"id":"4c8c77b2-b627-46a2-9313-a73d2e087e4e","name":"Fa Evmr Saasfaprod1","website":"https://fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com","url":"https://yesjob.brogu.ca/companies/4c8c77b2-b627-46a2-9313-a73d2e087e4e"},"url":"https://yesjob.brogu.ca/jobs/f9399fef-9c83-4f84-8455-e4841fd80af7","apply_url":"https://fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/41056","status":"open","location":"Canada","locations":[{"city":null,"region":null,"country":"CA"}],"workplace":"hybrid","remote_eligible_countries":[],"employment_types":["full_time"],"work_auth_required":"unspecified","term":null,"salary_cad_per_year":null,"languages_required":[],"seniority":"senior","first_seen_at":"2026-11-05T15:56:49.178Z","last_seen_at":"2026-11-06T22:37:56.520Z","salary_text":"Salary CAD Base 94,702.22 to 145,582.22 plus other potential benefits","summary":"- ASIC Verification Engineer role on the Optical Networks team, working as an independent contributor or leading a team on SoC/FPGA verification.\n- Requires a Bachelor's degree in CS/EE and minimum 8+ years of ASIC verification experience, plus SystemVerilog/UVM and Python.\n- Location is listed as Canada with CAD base salary of 94,702.22 to 145,582.22 plus other benefits; the posting does not state work authorization, workplace arrangement or hybrid days.","sources":["https://fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/41056"]}