Staff DSP ASIC Design Engineer
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Posted on the company's own website.
Can I apply?
- Full-time
- On-site
- Work permit not stated
- $95k–$146k CAD/yr
Staff-level independent contributor role on ASIC/FPGA SoC development and verification in the Optical Networks division.
Requires a B.Sc. in Electrical/Computer Engineering and a minimum of 5+ years of ASIC design experience.
Location is listed as Canada (CA) with a stated base salary of CAD 94,702.22 to 145,582.22; work arrangement and work authorization are not stated.
From the posting
- employment types
ATS employment type: full_time
- workplace
ATS workplace type: onsite
- locations
ATS location: Canada
- salary
Salary CAD Base 94,702.22 to 145,582.22 plus other potential benefits
- seniority
Staff DSP ASIC Design Engineer
- job function
Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
- role family
Staff DSP ASIC Design Engineer
- skills
Working knowledge of DSP/FEC and communication theories
- years experience min
Minimum of 5+ years ASIC design experience
- education required
B.Sc. in Elec/Computer Engineering is a must, higher degrees preferred
- actionable
Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
Job description
In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise. Join the Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.
NION2026
Responsibilities
• Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
• Working as independent contributor in algorithm development, fixed-point modelling and fixed-point performance verification
• Working with experts of different areas to ensure the most competitive solutions
• Cooperating with system engineers, HW/SW development, suppliers and other relevant functions to solve technical issues
• Supporting HW/SW bring-up and debug
Qualifications
B.Sc. in Elec/Computer Engineering is a must, higher degrees preferred
- Minimum of 5+ years ASIC design experience
- Solid design (micro-architecture/implementation) and debugging skills
- Working knowledge of DSP/FEC and communication theories
- Strong problem solving skills
- Good verbal/written communication skills and team work
- Good knowledge of ASIC design flow/tools, with backend knowledge being a great asset
Other Assets
- Working knowledge of MatLab and other scripting languages
- Knowledge of OTN, CAUI and other telecom protocols
Seen on
- oraclecloud — fa-evmr-saasfaprod1.fa.ocs.oraclecloud.com